Over the last two decades, as available gate count has steadily increased, the programmability of ASICs has also increased significantly. The relatively low cost of embedded CPU cores has made them attractive to designers looking to increase the flexibility of their designs or to future-proof their designs. This trend has significantly increased the complexity of today’s ASICs.
We can no longer afford to defer firmware development as a post-silicon activity. To ensure first-pass success of an ASIC, it is critical that firmware be architected and developed concurrently with ASIC design. Here are a few compelling reasons to schedule firmware development activity early in the ASIC design cycle.
Our team has an established record of working concurrently with ASIC designers in ensuring the first pass success of our products. Our firmware team has built up valuable experience developing firmware for a variety of product segments. This includes
We have extensive experience with the leading CPU cores from ARM & Tensilica. We have developed firmware using a variety of commercially available and internally designed operating systems. We have developed firmware around a wide range of CPU cores from ARM & Tensilica.
Our engagement model is flexible. We can partner with you in a number of ways. Our firmware team can partner with your ASIC team and deliver firmware that is in line with your ASIC design schedule. Alternately, we can augment your firmware team in any number of ways.